Microprocessadores8051 Aula 3InterrupoProf Afonso Ferreira Miguel

InterrupesMecanismos de InterrupoIntroduoDurante a execuo normal de um programa um dispositivo pode requisitar a ateno (IRQ);Para atender a IRQ do dispositivo, este suspende a execuo do programa e desvia para uma rotina de tratamento de interrupo (RTI) criada pelo usurio;Ao trmino da RTI, o processador continua a execuo do programa principal anteriormente suspenso.

InterrupesMecanismos de InterrupoIntroduoMainProgram

InterrupesMecanismos de InterrupoRTI (recomendaes)Rpida;Pequena;Salvar contexto;Para algoritmos complexos, utilizar mquinas de estado (Finite State Machine).

InterrupesEstrutura de uma RTISalvar o contexto: salvar variveis comuns a RTI e programa principal ou outras RTIS (utiliza geralmente PUSHs);Cdigo da RTI: atende as requisies do dispositivo que solicitou a RTI;Restaurar o contexto: recuperar o valor das variveis salvas no item anterior;RETI: instruo que retorna da RTI.

Microcontrolador 8051 (MCS-51)TCON (0x88)IE (0xA8)IP (0xB8)SCON (0x98)

Microcontrolador 8051 (MCS-51)The 8051 provides 5 interrupt sources

INT0 INT1TF0TF1RI/TI

External Interrupts and can be either level or transition activatedTimer 0 and 1 overflow/rollover activated Serial Port both receive and transmit Since both TX and RX are the same interrupt, the service routine will have to determine which it was.All the bits that generate interrupts can be set or cleared by software, with the same results as if they had been set or cleared by hardware.

Microcontrolador 8051 (MCS-51)

Microcontrolador 8051 (MCS-51)

Microcontrolador 8051 (Interrupes)Todas as fontes de interrupo podem ser individualmente habilitadas ou desabilitadas, ativando ou desativando bits em IE.

Microcontrolador 8051 (MCS-51)Interrupts flags are sample at S5P2 of every machine cycle.

Microcontrolador 8051 (MCS-51)O 8051 realiza um LCALL para a correspondente RTI, exceto nas seguintes condies:Uma interrupo de igual ou maior prioridade est em execuo;Uma instruo ainda no est completa; A instruo em progresso uma RETI ou est sendo realizada uma escrita em IE ou IP.

Microcontrolador 8051 (MCS-51)Priority can be set by the software;All interrupts can either be set to a high or low priority.

Microcontrolador 8051 (MCS-51)Priority works as followsHigh-priority interrupts can not be interrupted;Low-priority interrupts can be interrupted ONLY by high-priority interrupts;If two request of different priorities occur simultaneously, the request with the higher priority is serviced;

Microcontrolador 8051 (MCS-51)Priority works as followsIf request with the same priority occur simultaneously, then an internal polling sequence is used:

Microcontrolador 8051 (MCS-51)If none of the previous conditions have violated, then the 8051 will generate a LCALL to the appropriate serving routine. In most cases it also clears the flag that generated the interrupt.Note: Serial Port flag is never cleared and as such must be handled by software

LCALL pushes the current contents of the Program Counter onto the stack and reloads an address that depends on the source of the interrupt;

Execution proceeds until RETI is encountered. The execution of this command allows the 8051 to know that the current interrupt routine is no longer in progressThe 8051 then reloads the Program Counter from the stack and continues from where is left off.

Microcontrolador 8051 (MCS-51)

Microcontrolador 8051 (MCS-51)Interrupo:Estrutura em Assembly