EMENTA ELEC2104
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Transcript of EMENTA ELEC2104
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School of Electrical and Information Engineering Page 1 of 5
ELEC1103 Outline
ELEC2104 Electronic Devices and Circuits
Semester 2, 2013
Staff
Dr Craig JinUnit of Study Coordinator
Phone 9351 7208, [email protected],Room 854 J03(EE Bldg)
Dr Rui Hong Chu (Laboratory), [email protected]
Tutors and Lab demonstrators (2 per session)
Webhttp://elearning.sydney.edu.au
Tutorials
Mon 9am11am, 11am-1pm Room 417, EE Bldg.
Tues 11am-1pm Room 417, EE Bldg.
Laboratories
Thurs 9am12pm, 2pm-5pm Room 108, EE Link Bldg.
Fri 2pm-5pm Room 108, EE Link Bldg.
Text Richard Jaeger, Travis Blalock, Microelectronic Circuit Design FourthEdition, McGraw-Hill, 2011
Recommended Texts
Behzad Razavi, Fundamentals of Microelectronics, John Wiley, 2008
Adel Sedra, Kenneth Smith, Microelectronic Circuits, 6ed, Oxford UniversityPress
Paul Horowitz, Winfield Hill, The Art of Electronics, Cambridge University Press
S.M. Sze, Semiconductor Deives Physics and Technology, Wiley
Description
This unit of study is a six credit point core requirement for Electrical, Computer,Telecommunications, Bioelectronic, and Power Engineering. It covers thefundamentals of microelectronic circuits and provides a foundation for moreadvanced courses in electronics such as analogue and digital electronic design,instrumentation, electrical machines, power systems, communications, and
signal processing.
mailto:[email protected]:[email protected]:[email protected]://elearning.sydney.edu.au/http://elearning.sydney.edu.au/http://elearning.sydney.edu.au/http://elearning.sydney.edu.au/mailto:[email protected] -
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ELEC1103 Outline
Aims
A primary aim of this unit of study is to provide a platform for students to developtheir understanding and analytical skills in the art of microelectronic circuitdesign. This platform consists of developing a physical intuition for the physical
laws of second-order circuits, resonance and damping, semiconductors and thePN junction, MOS transistors, and Bipolar transistors; of developing amathematical intuition for the large-signal and small-signal models of the diode,MOS transistor, and Bipolar transistor; of developing mathematical familiarity withBode Analysis of network functions. It also consists of developing skills to designand analyse microelectronic circuits and their building blocks from a design-oriented analysis paradigm; of developing skills to simplify and approximate; ofdeveloping skills to make and analyse electrical measurements with electroniclab equipment. In summary, this unit of study promotes independent thinking andcreativity along with necessary skills that are fundamental to the art ofmicroelectronic circuit design.
Attributes
This unit of study develops personal attributes in the areas of design andproblem solving skills; discipline specific expertise; fundamentals of science andengineering; information skills; professional communication; professional values,judgement and conduct; team work and project management.
Learning Situations
One two-hour lecture, one two-hour tutorial and one three-hour laboratory aretimetabled for each week of the semester. It may be the case that not all of the
tutorial and laboratory sessions are required.
Students are expected to
attend all lectures,
attend all tutorial classes
attend all laboratory classes
maintain awareness of any information made available on the unit webpages,
complete all assignments
Learner Preparation
It is assumed that students have taken the equivalent of ELEC1103 and thatstudents are familiar with Ohms law and Kirchoffs laws; current and voltagesources, network analysis, superposition, Thevenin and Norton equivalentcircuits, resistors, capacitors, and inductors.
Assessment
Grade descriptors
Students awarded the various passing grades are expected to have the followingattributes:
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ELEC1103 Outline
Pass (P)A P grade student is expected to have sufficient understandingof the core material to solve the basic problems arising in tutorial andlaboratory work. The student should demonstrate an ability to analyseand design basic circuits.
Credit (CR)A CR level student is expected to have a goodunderstanding of the core material as evidenced by the ability to solve allrelevant problems. The student should demonstrate an ability to designand differentiate between various basic circuits.
Distinction (D)A D level student is expected to have an excellentunderstanding of the core material plus a good understanding of theadvanced material such as phasors, linear systems, and circuit modelequivalents. The student should demonstrate an ability to apply designprinciples to new problems similar to those presented in class.
High Distinction (HD)A HD level student is expected to have a deep
understanding of material covered in the unit. The student shoulddemonstrate an ability to apply design principles in a creative andcomprehensive fashion to new problems in basic circuit design.
Assessment components
The total mark for the unit will be obtained by adding the following components:
1. Weekly Assignments (20)
2. Laboratory Assignments (20)
3. Mid-Term Exam (10)
4. Final Exam (50 marks). The examination is closed book. Theexamination mark maybe scaled before being incorporated with the othercomponent marks.
Program
Week Date Topic Reading
1 27 July Introduction to Microelectronics J&B 1.3-1.5
R 1.3
S&S App D28 Jul Review of Circuit Theory
2 3 August Physics of Semiconductors J&B 2.1-2.10
R 2.1
S&S 1.7-1.94 August Semiconductors and Carriers
3 10 August PN Junction Diodes: Electrostatics and
Capacitance
J&B 3.1-3.7, 3.18
R 3.1-3.4
S&S 1.10-1.1211 August Diode Operation
Lab 1 Introduction to lab equipment, Diodes
4 17 August PN Junction Diodes: Models and Circuits J&B 3.10-3.16
R 3.5
S&S 3.1-3.6
18 August Application of Diode Circuits
Lab 2 Diodes and Rectifiers
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ELEC1103 Outline
5 24 August Bipolar Transistors: Physics and
Structure
J&B 5.1-5.7
R 4.1-4.6
S&S 4.1-4.425 August Bipolar Transistors: Operation and
Transconductance
Lab 3 BJT Characterization
6 31 August Bipolar Transistors: Practical Circuits J&B 5.8-5.11
R 5.1-5.3
S&S 4.5-4.8
1 September Bipolar Transistors: Nonideal Behaviour
Lab
7 7 September MOS Devices: Capacitors and Physics J&B 4.1-4.10
R 6.1-6.6
S&S 5.1-5.3
8 September CMOS Transistors
Lab
8 14
September
Single Transistor Amplifiers: Biasing and
Models
J&B 14.1
R 7.1-7.4
S&S 5.4-5.815September
Analysis of Single Transistor Amplifiers
Lab 4 MOSFETS and CMOS Logic
9 21
September
Mid-Term Exam J&B 10.2-10.5
R 8.1-8.2
S&S 2.1-2.322
September
Review of Op-Amps
Lab
26-30
September
Mid semester break
10 5 October Analysis of Op-amp Circuits J&B 10.7-10.10
R 14.1-14.3
S&S 11.1-11.4
6 October Frequency Response, Bode Plots and
Transfer Functions
Lab 5 Project
11 12 October Review of Passive Filters J&B 12.3
R 14.1-14.3
S&S 1.6
13 October Active Filters
Lab
12 19 October First-Order Sections J&B 17.4
R 11.2
S&S 8.1-8.4
20 October First-Order Sections
Lab
13 26 October Second-Order Sections
27 October Final Review
Lab
Web Links (Administrative)
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ELEC1103 Outline
Special consideration, School Policies
http://www.ee.usyd.edu.au/undergraduates/policies_and_forms/index.phtml
Examinations timetable
http://sydney.edu.au/current_students/student_administration/examinations/students.shtml
Student Administration
http://sydney.edu.au/current_students/student_administration/examinations/index.shtml
University policy on academic honesty
http://www.ee.usyd.edu.au/undergraduates/policies_and_forms/EIE_Acad_Honesty_statement.ph
tml
http://www.ee.usyd.edu.au/undergraduates/policies_and_forms/index.phtmlhttp://www.ee.usyd.edu.au/undergraduates/policies_and_forms/index.phtmlhttp://sydney.edu.au/current_students/student_administration/examinations/students.shtmlhttp://sydney.edu.au/current_students/student_administration/examinations/students.shtmlhttp://sydney.edu.au/current_students/student_administration/examinations/index.shtmlhttp://sydney.edu.au/current_students/student_administration/examinations/index.shtmlhttp://www.ee.usyd.edu.au/undergraduates/policies_and_forms/EIE_Acad_Honesty_statement.phtmlhttp://www.ee.usyd.edu.au/undergraduates/policies_and_forms/EIE_Acad_Honesty_statement.phtmlhttp://www.ee.usyd.edu.au/undergraduates/policies_and_forms/EIE_Acad_Honesty_statement.phtmlhttp://www.ee.usyd.edu.au/undergraduates/policies_and_forms/EIE_Acad_Honesty_statement.phtmlhttp://www.ee.usyd.edu.au/undergraduates/policies_and_forms/EIE_Acad_Honesty_statement.phtmlhttp://sydney.edu.au/current_students/student_administration/examinations/index.shtmlhttp://sydney.edu.au/current_students/student_administration/examinations/students.shtmlhttp://www.ee.usyd.edu.au/undergraduates/policies_and_forms/index.phtml